ATS'17

Symposium Overview

The Asian Test Symposium (ATS) provides an open forum for researchers and industrial practitioners from all countries of the world to exchange innovative ideas on system, board, and device testing with design, manufacturing and field consideration in mind.

Submission deadline: May 26, 2017 -> June 9, 2017 (extended)

Notification of acceptance: July 31, 2017

Camera ready manuscript: September 1, 2017

Original papers on, but not limited to, the following areas are invited.

  • Analog/Mixed-Signal Test
  • Automatic Test Generation
  • Board Test and Diagnosis
  • Boundary Scan Test
  • Built-In Self-Test (BIST)
  • Defect-Based Test
  • Delay and Performance Test
  • Dependability and Functional Safety
  • Design for Test (DFT)
  • Diagnosis and Silicon Debug
  • Economic of Test
  • Failure Analysis
  • Fault Modeling and Simulation
  • Fault Tolerance
  • GPU Test
  • High-Speed I/O Test
  • Low-Power IC Test
  • Memory Test and Repair
  • MEMS Test
  • Multi-/Many-core Processor Test
  • Nanotechnology Test
  • On-line Test
  • Power/Thermal/Reliability Issues in Test
  • Reconfigurable System Test
  • Reliability
  • RF Test
  • Hardware-oriented Security and Trust
  • Self-Repair
  • Sensor Test
  • SiP, Stacked, 3D IC Test
  • SoC Test
  • Standards in Test
  • Statistical Learning in Test
  • Test Compression
  • Test Quality
  • Test Synthesis
  • Validation and Verification
  • Yield Analysis and Enhancement